[Gollum]

Since dual cores are getting common, will they ever come out with a 2x dual channel mobo?

meaning sit all 4 dimms , dual channel per core. would that be fast? or maybe even 4 channels for a single core?

[lanc3r]

shld be possible on amd systems since dual core means dual memory controllers.

[<<neO.n>>]

Currently, from what I understand, the integrated memory controllers on the Dual-Core X2 processors of AMD (AMD 64 X2) are shared - this means that they will only support the memory banks united for both cores. While this situation might change if AMD decide to change their architecture for their A64 X2 processors, I have my doubts as to whether this is likely...

Firstly, from an economic perspective, this would involve a very very major revamp of their current architecture and the shared memory controller and other resources is supposed to be a part of the feature set that AMD believes to be superior to Intel's offerings - the shared resources of the X2 are more efficient than the Intel Pentium D implementation of using the FSB for core-core communication.

Secondly, from the performance perspective, there has already been suggestions that AMD's processors might provide support for DDR 480/500 as the standard. From experience, the increased memory bandwidth provides superior improvements to performance compared to the implementation of a dual channel setup. In other words, performance scales better with increases in memory bandwidth compared to the use of a dual channel. This means that having DUAL dual-channels for a dual core system might be less compelling on this front as well.

All this is speculation as AMD's plans might possibly include the idea as mooted by the threadstarter.... if so, it will be interesting to see if they actually do it. Again, I suspect that this will be unlikely to happen.

<<neO.n>>

[dxter]

I see that if the dual core has 2 dedicated memory controllers and a mobo with 2x dual channel architecture if there is one. Would be akin to comparing SMPs to distributed systems.

In the current architecture, the 2 cores share a memory controller that accesses the memory for them. The data are situated in the same area (of memory), so the controller would mitigate access to the data.

With 2x dual channel and thus needing two separate memory controllers, the software/hardware would need to find a way to distibute this data into separate areas. Or even worse, contain the same data in both areas. There will be a lot of communication between the cores as to how to share the data, divide up the work, etc. This would require some sort of middleware to schedule/divide up the processes and more effort on the programmers to divide up their data into separate channels.

The current system works really well because the data in memory is shared, thus alleviating the headache of replicating data, updating changes, and transferring them ard. This shld the best way for such a small multi-processing system.

[MichaelTan]

Originally Posted by <<neO.n>>

Currently, from what I understand, the integrated memory controllers on the Dual-Core X2 processors of AMD (AMD 64 X2) are shared - this means that they will only support the memory banks united for both cores.

Yes. Anything else will take you into blade territory.

[lanc3r]

Originally Posted by MichaelTan

Yes. Anything else will take you into blade territory.

pardon me, abit WOLS.

when u mean blade territory do u mean separate cores?

Most likely he meant SERVER mainboards. Which have seperate memory channels for each core. Adding seperate memory controllers and memory lanes adds to cost. Notice dual xeon boards approching and going over the $1000 mark?